The present invention relates to a semiconductor device, an electronic device, and a method for controlling a semiconductor device.
It is required that power consumption of semiconductor devices be reduced while also ensuring the required performance thereof.
For example, Japanese Unexamined Patent Application Publication No. 2002-288150 discloses a semiconductor integrated circuit device including a high-performance central processing unit (CPU), a low-power-consumption CPU, a process judgment unit, a power supply voltage control management unit, and a clock supply control unit. The process judgment unit determines whether the high-performance CPU or the low-power-consumption CPU is the optimum CPU to be used, on the basis of a process to be executed by the semiconductor integrated circuit device. The power supply voltage control management unit controls power supply to the high-performance CPU and the low-power-consumption CPU on the basis of the determination result made by the process judgment unit. The clock supply control unit controls clock supply to the high-performance CPU and the low-power consumption CPU on the basis of the determination result made by the process judgment unit.
Japanese Unexamined Patent Application Publication No. 2005-285093 discloses a power supply device for supplying power to a processor. The power supply device includes a required task performance table, a power mode table, a required system performance calculation block, and a power mode determination block. The required task performance table stores performance required for each of a plurality of tasks to be executed by the processor. In the power mode table, an operating frequency and an application voltage which the processor uses to achieve required system performance are defined. The required system performance calculation block calculates required system performance on the basis of the required task performance table. The power mode determination block sets the operating frequency and application voltage of the processor on the basis of the required system performance calculated by the required system performance calculation block and the power mode table.